? AUIRF7341Q v dss 55v r ds(on) typ. 0.043 ?? i d 5.1a max. 0.050 ?? description specifically designed for automotive applications, these hexfet? power mosfet's in a dual so-8 package utilize the lastest processing techniques to achieve extremely low on-resistance per silicon area. additional features of these automotive qualified hexfet power mosfet's are a 175c junction operating temperature, fast switching speed and improved repetitive avalanche rating. these benefits combine to make this design an extremely efficient and reliable device for use in automotive applications and a wide variety of other applications. the efficient so-8 package provides enhanced thermal characteristics and dual mosfet die capability making it ideal in a variety of power applications. this dual, surface mount so-8 can dramatically reduce board space and is also available in tape & reel. features ? advanced planar technology ? ultra low on-resistance ? logic level gate drive ? dual n channel mosfet ? surface mount ? available in tape & reel ? 175c operating temperature ? lead-free, rohs compliant ? automotive qualified * 1 2015-9-30 hexfet? is a registered trademark of infineon. * qualification standards can be found at www.infineon.com ? automotive grade symbol parameter max. units v ds drain-source voltage 55 v i d @ t a = 25c continuous drain current, v gs @ 10v 5.1 a ? i d @ t a = 70c continuous drain current, v gs @ 10v 4.2 i dm pulsed drain current ? 42 p d @t a = 25c maximum power dissipation ? 2.4 p d @t a = 70c maximum power dissipation ? 1.7 linear derating factor 16 mw/c v gs gate-to-source voltage 20 v e as single pulse avalanche energy (thermally limited) ? 140 mj i ar avalanche current 5.1 a e ar repetitive avalanche energy see fig.17, 18, 15a, 15b mj t j operating junction and -55 to + 175 c ? t stg storage temperature range w absolute maximum ratings stresses beyond those listed under ?absolute maximum ratings? ma y cause permanent damage to the device. these are stress ratings only; and functional operation of the device at these or any other condition beyond thos e indicated in the specificatio ns is not implied. exposure to absolute-maximum-rated conditions for exte nded periods may affect device reliability. the thermal resistan ce and power dissipation ratings are measured under board mounted and still air conditions. ambient temperature (ta) is 25c, unle ss otherwise specified. thermal resistance ? symbol parameter typ. max. units c/w r ? ja junction-to-ambient ? ??? 62.5 so-8 AUIRF7341Q base part number package type standard pack orderable part number form quantity AUIRF7341Q so-8 tape and reel 4000 AUIRF7341Qtr g d s gate drain source d1 d1 d2 d2 g1 s2 g2 s1 top view 8 1 2 3 4 5 6 7
? AUIRF7341Q 2 2015-9-30 notes: ? ? repetitive rating; pulse width limited by max. junction temperature. ? v dd =25v, starting t j = 25c, l = 10.7mh, r g = 25 ? , i as = 5.2a. ? pulse width ?? 300s; duty cycle ? 2%. ? surface mounted fr-4 board, t ? 10sec. static @ t j = 25c (unless otherwise specified) parameter min. typ. max. units conditions v (br)dss drain-to-source breakdown voltage 55 ??? ??? v v gs = 0v, i d = 250a ? v (br)dss / ? t j breakdown voltage temp. coefficient ??? 0.052 ??? v/c reference to 25c, i d = 1ma r ds(on) static drain-to-source on-resistance ??? 0.043 0.050 ???? v gs = 10v, i d = 5.1a ? ??? 0.056 0.065 v gs = 4.5v, i d = 4.42a ? v gs(th) gate threshold voltage 1.0 ??? 3.0 v v ds = v gs , i d = 250a gfs forward trans conductance 10.4 ??? ??? s v ds = 10v, i d = 5.2a i dss drain-to-source leakage current ??? ??? 2.0 a v ds =44v, v gs = 0v ??? ??? 25 v ds = 44v,v gs = 0v,t j =150c i gss gate-to-source forward leakage ??? ??? 100 na v gs = 20v gate-to-source reverse leakage ??? ??? -100 v gs = -20v dynamic electrical characteristics @ t j = 25c (unless otherwise specified) q g total gate charge ??? 29 44 nc ? i d =5.2a q gs gate-to-source c harge ??? 2.9 4.4 v ds = 44v q gd gate-to-drain charge ??? 7.3 11 v gs = 10v t d(on) turn-on delay time ??? 9.2 ??? ns v dd = 28v t r rise time ??? 7.7 ??? i d = 1.0a t d(off) turn-off delay time ??? 31 ??? r g = 6.0 ?? t f fall time ??? 12.5 ??? v gs = 10v ? ? c iss input capacitance ??? 780 ??? pf ? v gs = 0v c oss output capacitance ??? 190 ??? v ds = 25v c rss reverse transfer capacitance ??? 66 ??? ? = 1.0mhz diode characteristics ? parameter min. typ. max. units conditions i s continuous source current ??? ??? 2.4 a mosfet symbol (body diode) showing the i sm pulsed source current ??? ??? 42 integral reverse (body diode) ??? p-n junction diode. v sd diode forward voltage ??? ??? 1.2 v t j = 25c,i s = 2.6a,v gs = 0v ??? t rr reverse recovery time ??? 51 77 ns t j = 25c ,i f = 2.6a, q rr reverse recovery charge ??? 76 114 nc di/dt = 100a/s ???
? AUIRF7341Q 3 2015-9-30 fig. 2 typical output characteristics fig. 3 typical transfer characteristics fig. 4 normalized on-resistance vs. temperature fig. 1 typical output characteristics 0.1 1 10 100 v ds , drain-to-source voltage (v) 0.1 1 10 100 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 2.7v 20s pulse width tj = 25c vgs top 15.0v 10.0v 7.0v 5.5v 4.5v 4.0v 3.5v bottom 2.7v 0.1 1 10 100 v ds , drain-to-source voltage (v) 0.1 1 10 100 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 20s pulse width tj = 175c 2.7v vgs top 15.0v 10.0v 7.0v 5.5v 4.5v 4.0v 3.5v bottom 2.7v 1 10 100 2.0 3.0 4.0 5.0 6.0 7.0 v = 25v 20s pulse width ds v , gate-to-source voltage (v) i , drain-to-source current (a) gs d t = 25 c j t = 175 c j -60 -40 -20 0 20 40 60 80 100 120 140 160 180 0.0 0.5 1.0 1.5 2.0 2.5 t , junction temperature ( c) r , drain-to-source on resistance (normalized) j ds(on) v = i = gs d 10v 5.2a
? AUIRF7341Q 4 2015-9-30 fig 5. typical capacitance vs. drain-to-source voltage fig 6. typical gate charge vs. gate-to-source voltage ? fig 8. maximum safe operating area fig. 7 typical source-to-drain diode forward voltage 1 10 100 v ds , drain-to-source voltage (v) 0 200 400 600 800 1000 1200 1400 c , c a p a c i t a n c e ( p f ) coss crss ciss v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd 0 10 20 30 40 50 0 4 8 12 16 20 q , total gate charge (nc) v , gate-to-source voltage (v) g gs i = d 5.2a v = 11v ds v = 27v ds v = 44v ds 0.1 1 10 100 0.2 0.5 0.8 1.1 1.4 v ,source-to-drain voltage (v) i , reverse drain current (a) sd sd v = 0 v gs t = 175 c j t = 25 c j 0.1 1 10 100 1000 0.1 1 10 100 1000 operation in this area limited by r ds(on) single pulse t t = 175 c = 25 c j c v , drain-to-source voltage (v) i , drain current (a) i , drain current (a) ds d 10us 100us 1ms 10ms
? AUIRF7341Q 5 2015-9-30 fig 11. maximum effective transient thermal impedance, junction-to-ambient fig 9. maximum drain current vs. case temperature fig 10a. switching time test circuit fig 10b. switching time waveforms 25 50 75 100 125 150 175 0.0 1.0 2.0 3.0 4.0 5.0 6.0 t , case temperature ( c) i , drain current (a) c d 0.01 0.1 1 10 100 0.00001 0.0001 0.001 0.01 0.1 1 10 100 notes: 1. duty factor d = t / t 2. peak t = p x z + t 1 2 j dm thja a p t t dm 1 2 t , rectangular pulse duration (sec) thermal response (z ) 1 thja 0.01 0.02 0.05 0.10 0.20 d = 0.50 single pulse (thermal response)
? AUIRF7341Q 6 2015-9-30 fig 12. typical on-resistance vs. gate voltage fig 13. typical on-resistance vs. drain current vds vgs id vgs(th) qgs1 qgs2 qgd qgodr fig 14a. basic gate charge waveform fig 14b. gate charge test circuit r g i as 0.01 ? t p d.u.t l v ds + - v dd driver a 15v 20v fig 15a. unclamped inductive test circuit t p v (br)dss i as fig 15b. unclamped inductive waveforms fig 16. maximum avalanche energy vs. drain current 25 50 75 100 125 150 175 0 80 160 240 320 400 starting tj, junction temperature ( c) e , single pulse avalanche energy (mj) as i d top bottom 2.1a 4.3a 5.1a
? AUIRF7341Q 7 2015-9-30 ? fig 17. typical avalanche current vs. pulse width notes on repetitive avalanche curves , figures 17, 18: (for further info, see an-1005 at www.infineon.com ) 1. avalanche failures assumption: purely a thermal phenomenon and failure occurs at a temperature far in excess of t jmax . this is validated for every part type. 2. safe operation in avalanc he is allowed as long as t jmax is not exceeded. 3. equation below based on circuit and waveforms shown in figures 15a, 15b. 4. p d (ave) = average power dissipation per single avalanche pulse. 5. bv = rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. i av = allowable avalanche current. 7. ? t = allowable rise in junction temperature, not to exceed t jmax (assumed as 25c in figure 11, 17). t av = average time in avalanche. d = duty cycle in avalanche = t av f z thjc (d, t av ) = transient thermal resistance, see figures 11) p d (ave) = 1/2 ( 1.3bvi av ) = ? t/ z thjc i av = 2 ? t/ [1.3bvz th ] e as (ar) = p d (ave) t av fig 18. maximum avalanche energy vs. temperature 1.0e-06 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 1.0e+02 tav (sec) 0.001 0.01 0.1 1 10 100 a v a l a n c h e c u r r e n t ( a ) 0.05 duty cycle = single pulse 0.10 allowed avalanche current vs avalanche pulsewidth, tav assuming ? tj = 25c due to avalanche losses 0.01 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 20 40 60 80 100 120 140 e a r , a v a l a n c h e e n e r g y ( m j ) top single pulse bottom 10% duty cycle i d = 5.1a
? AUIRF7341Q 8 2015-9-30 ? so-8 part marking information so-8 package outline (dimensions are shown in millimeters (inches) e1 d e y b a a1 h k l .189 .1497 0 .013 .050 basic .0532 .0040 .2284 .0099 .016 .1968 .1574 8 .020 .0688 .0098 .2440 .0196 .050 4.80 3.80 0.33 1.35 0.10 5.80 0.25 0.40 0 1.27 basic 5.00 4.00 0.51 1.75 0.25 6.20 0.50 1.27 min max millimeters in c h es min max dim 8 e c .0075 .0098 0.19 0.25 .025 basic 0.635 basic 87 5 65 d b e a e 6x h 0.25 [.010] a 6 7 k x 45 8x l 8x c y 0.25 [.010] c ab e1 a a1 8x b c 0.10 [.004] 43 12 footprint 8x 0.72 [.028] 6.46 [.255] 3x 1.27 [.050] 4. outline conforms to jedec outline ms-012aa. n o tes: 1. d im en sio n in g & to leran c in g per asm e y14.5m -1994. 2. controlling dim ension: millimeter 3. dimensions are shown in millimeters [inches]. 5 d im en sio n d o es n o t in c lu d e m o ld pro tru sio n s. 6 d im en sio n d o es n o t in c lu d e m o ld pro tru sio n s. m o ld pro tru sio n s n o t to exc eed 0.25 [.010]. 7 d im en sio n is th e len g th o f lead fo r so ld erin g to a s u b s t r a t e . m o ld pro tru sio n s n o t to exc eed 0.15 [.006]. 8x 1.78 [.070]
? AUIRF7341Q 9 2015-9-30 so-8 tape and reel ( dimensions are shown in millimeters (inches) 330.00 (12.992) max. 14.40 ( .566 ) 12.40 ( .488 ) notes : 1. controlling dimension : millimeter. 2. outline conforms to eia-481 & eia-541. feed direction terminal number 1 12.3 ( .484 ) 11.7 ( .461 ) 8.1 ( .318 ) 7.9 ( .312 ) notes: 1. controlling dimension : millimeter. 2. all dimensions are shown in millimeters(inches). 3. outline conforms to eia-481 & eia-541.
? AUIRF7341Q 10 2015-9-30 ? qualification information qualification level automotive (per aec-q101) comments: this part number(s) passed automotive qualification. infineon?s industrial and consumer qualification level is granted by extension of the higher automotive level. moisture sensitivity level so-8 msl1 esd machine model class m2 (+/- 200v) ? aec-q101-002 human body model ? class h1a (+/- 500v) ? aec-q101-001 charged device model class c5 (+/- 1125v) ? aec-q101-005 rohs compliant yes published by infineon technologies ag 81726 mnchen, germany ? infineon technologies ag 2015 all rights reserved. important notice the information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (?beschaffenheitsgarantie?). with respect to any examples , hints or any typical values stated herein and/or any information regarding the application of the product, infineon technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any thi rd party. in addition, any information given in this document is subject to customer?s compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer ?s products and any use of the product of infineon technologies in customer?s applications. the data contained in this document is exclusively intended for technically trai ned staff. it is the responsibility of customer?s technical departments to evaluate the suit ability of the product for the intended application and the completeness of the product information given in this document with respect to such application. for further information on the product, technology, delivery terms and conditions and prices please contact your nearest infineon technologies office ( www.infineon.com ). warnings due to technical requirements products may contain danger ous substances. for information on the types in question please contact your nearest infineon technologies office. except as otherwise explicitly appr oved by infineon technologies in a written document signed by authorized representatives of infineon technologies, infineon technolog ies? products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury. revision history date comments 9/30/2015 ?? updated datasheet with corporate template ?? corrected ordering table on page 1. 3/10/2014 ?? added "logic level gate drive" bullet in the features section on page 1 ?? updated data sheet with new ir corporate template ? highest passing voltage.
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